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Junction Capacitances Cgd, Cgs, Cds and Distributed Parameters Ciss, Crss, Coss
The term "junction capacitance" applies to all FETs, not just VMOS devices, and to all VMOS transistors; only the measurement and designation methods differ. The representation in Figure 3.12 is also an approximation—in reality, junction capacitance also includes the capacitance between the lead electrodes and the die, between the various parts of the die, and between the die and the package.
In a BJT (bipolar junction transistor), Cgd is also called the Miller capacitance (Cbc); the same term can be applied to FETs, since the two are functionally equivalent.
Although junction capacitances are very small, their effect on circuit stability cannot be ignored; if not handled properly, they often cause high-frequency self-oscillation. Even more disadvantageous is that driving a gate-controlled device requires only a control voltage, not control power; however, at higher operating frequencies, the junction capacitances can dissipate significant drive power—the higher the frequency, the greater the power dissipated.
In practice, for ease of analysis, the junction capacitance parameters are generally not used directly; instead, three variables are redefined, collectively called distributed capacitances, as follows.
Input Capacitance: Ciss = Cgd + Cgs
Output Capacitance: Coss = Cgd + Cds
Reverse Transfer Capacitance: Crss = Cgd
The concept of distributed capacitance is introduced because junction capacitance is determined by the transistor's material and structure and does not fully reflect the actual effect on transistor circuits. Distributed capacitance, on the other hand, mainly reflects the effect of junction capacitance on the operating circuit.
Whether it is Ciss, Coss, or Crss, we want them all to be as small as possible.
Ciss increases drive power. In high-frequency applications, the gate drive signal must charge and discharge Ciss, which affects switching speed. Lowering the output impedance of the drive circuit helps increase output current and speed up charging and discharging of Ciss, thereby improving switching speed.
Ciss can prevent a VMOS device from being fully turned off in high-frequency applications, wasting power and reducing the PD rating; Crss causes positive feedback—that is, the output signal feeds back from the drain to the gate, causing self-oscillation.
The values of Ciss, Coss, and Crss depend on the source-drain voltage VDSS, so some published references also call them dynamic characteristics; however, they are virtually unaffected by temperature, which simplifies our circuit analysis.
Even a single VMOS device is made up of countless die cells, each of which can be regarded as a miniature VMOS device. For a single die cell, the junction capacitance is very small, but for tens of thousands of die cells, these junction capacitances are essentially in parallel, making the total capacitance considerable. Therefore, the smaller the junction capacitance of each die cell and the fewer die cells in a package, the smaller the above capacitance values; for VMOS devices with the same voltage/current rating, smaller distributed capacitance means more advanced process technology and a higher operating frequency capability.
Capacitance is nonlinear with respect to high-speed switching signals; only sine waves are close to linear. Therefore, Ciss, Coss, and Crss are rarely used for quantitative calculations but rather for qualitative analysis. To quantitatively calculate the effect of distributed parameters on a circuit, a simpler approach is generally used: the concept of gate charge.
